专利名称：ADJUSTABLE DELAY CIRCUIT发明人：REINER BACKES,ULRICH LANGENKAMP申请号：AU2450384申请日：19840213公开号：AU2450384A公开日：19840823
摘要：A delay circuit provides adjustable delay in constant increments. In order toachieve adjustable but constant delay times of a chain of inverter pairs, each pair iscompleted by a capacitor, a third inverter, and a transfer transistor the gate of which isfed by a voltage controlling the pair delay time. This voltage is generated by a controlcircuit measuring the actual delay time of the chain with respect to the period of aconstant clock signal.
申请人：INTERNATIONAL STANDARD ELECTRIC CORP.
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